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Opteron is AMD 's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture known generically as x or AMD It was released on April 22, , with the SledgeHammer core K8 and was intended to compete in the server and workstation markets, particularly in the same segment as the Intel Xeon processor.

Processors based on the AMD K10 microarchitecture codenamed Barcelona were announced on September 10, , featuring a new quad-core configuration. In January , the first ARMv8-A based Opteron-branded SoC was released, [1] though it is unclear what, if any, heritage this Opteron-branded product line shares with the original Opteron technology other than intended use in the server space.

The first capability is notable because at the time of Opteron's introduction, the only other bit architecture marketed with bit x86 compatibility Intel's Itanium ran x86 legacy-applications only with significant speed degradation. In combining these two capabilities, however, the Opteron earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to bit computing. This both reduces the latency penalty for accessing the main RAM and eliminates the need for a separate northbridge chip.

In multi-processor systems more than one Opteron on a single motherboard , the CPUs communicate using the Direct Connect Architecture over high-speed HyperTransport links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing ; instead of having one bank of memory for all CPUs, each CPU has its own memory.

The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional and expensive routing chips to support more than 8 CPUs per box. In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon [2] which didn't have a point to point system until QPI and integrated memory controllers with the Nehalem design. This is primarily because adding another Opteron processor increases memory bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric , rather than a shared bus.

In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a typical Xeon system, contention for the shared bus causes computing efficiency to drop.

Intel migrated to a memory architecture similar to the Opteron's for the Intel Core i7 family of processors and their Xeon derivatives. At the time, AMD's use of the term multi-core in practice meant dual-core ; each physical Opteron chip contained two processor cores.

This effectively doubled the computing performance available to each motherboard processor socket. One socket could then deliver the performance of two processors, two sockets could deliver the performance of four processors, and so on. Because motherboard costs increase dramatically as the number of CPU sockets increase, multicore CPUs enable a multiprocessing system to be built at lower cost. AMD's model number scheme has changed somewhat in light of its new multicore lineup.

At the time of its introduction, AMD's fastest multicore Opteron was the model , with two cores running at 2. AMD's fastest single-core Opteron at this time was the model , with one core running at 2. For multithreaded applications, or many single threaded applications, the model would be much faster than the model Second-generation Opterons are offered in three series: the Series single socket only , the Series dual socket-capable , and the Series quad or octo socket-capable.

The Series uses the AM2 socket. The Series and Series use Socket F. AMD announced its third-generation quad-core Opteron chips on September 10, [3] [4] with hardware vendors announcing servers in the following month.

Based on a core design codenamed Barcelona , new power and thermal management techniques were planned for the chips. Earlier dual core DDR2 based platforms were upgradeable to quad core chips.

It introduced HT Assist , an additional directory for data location, reducing the overhead for probing and broadcasts. These are 8- and core multi-chip module CPUs consisting of two four or six-core dies with a HyperTransport 3. AMD changed the naming scheme for its Opteron models. Opteron series CPUs on Socket C32 released July are dual-socket capable and are targeted at uniprocessor and dual-processor uses.

The Opteron series CPUs on Socket G34 are quad-socket capable and are targeted at high-end dual-processor and quad-processor applications. AMD released Socket Opterons, reducing the cost of motherboards for low-end servers and workstations.

Except for the fact they have 1 MB L2 Cache versus KB for the Athlon64 the Socket Opterons are identical to the San Diego and Toledo core Athlon 64s , but are run at lower clock speeds than the cores are capable of, making them more stable. Socket AM2 Opterons are available for servers that only have a single-chip setup. Codenamed Santa Ana, rev.

These CPUs are given model numbers ranging from to This socket supports processors such as the Santa Rosa, Barcelona, Shanghai, and Istanbul codenamed processors. Physically the socket and processor package are nearly identical, although not generally compatible with socket FX. New processors, launched in the third quarter of codename Barcelona , incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD execution and branch prediction , yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope.

APU features table. For all first, second, and third-generation Opterons, the first digit the X specifies the number of CPUs on the target machine:. Socket C32 and G34 Opterons use a new four-digit numbering scheme.

The first digit refers to the number of CPUs in the target machine:. Like the previous second and third generation Opterons, the second number refers to the processor generation. For all Opterons, the last two digits in the model number the YY indicate the clock frequency of a CPU, a higher number indicating a higher clock frequency. This speed indication is comparable to processors of the same generation if they have the same amount of cores, single-cores and dual-cores have different indications despite sometimes having the same clock frequency.

Starting from 65 nm fabrication process, the Opteron codenames have been based on Formula 1 hosting cities; AMD has a long term sponsorship with F1's most successful team, Ferrari. They were first released in January Opteron processors first appeared in the top systems of the fastest supercomputers in the world list in the early s.

By the summer of , 21 of the top systems used Opteron processors, and in the November and June lists the Opteron reached its maximum representation of 33 of the top systems. The number of Opteron-based systems decreased fairly rapidly after this peak, falling to 3 of the top systems by November , and in November only one Opteron-based system remained. Several supercomputers using only Opteron processors were ranked in the top 10 systems between and , notably:.

Other top 10 systems using a combination of Opteron processors and compute accelerators have included:. The only system remaining on the list as of November , also using Opteron processors combined with compute accelerators:. The following table describes those processors without OPM.

The affected processors may produce inconsistent results if three specific conditions occur simultaneously:. A software verification tool for identifying the AMD Opteron processors listed in the above table that may be affected under these specific conditions is available, only to AMD OEM partners. It was described as "The best overclocker's CPU ever made" due to its low cost and ability to run at speeds far beyond its stock speed.

From Wikipedia, the free encyclopedia. Server and workstation processor line by Advanced Micro Devices. Not to be confused with Operon. Main article: Bulldozer microarchitecture. Main article: Piledriver microarchitecture.

Main article: Jaguar microarchitecture. Main article: ARM architecture. Main article: Excavator microarchitecture. Retrieved September 5, Retrieved December 27, Press release. September 10, Retrieved January 6, Archived from the original on November 28, Retrieved March 6, They were a drop-in upgrade for existing Socket F servers.

Retrieved January 2, Retrieved March 16, Retrieved October 19, April 22, Archived from the original on February 20, Retrieved February 21, Retrieved January 9, Advanced Micro Devices. April Retrieved November 30, AMD processors. Bobcat aka 14h 16h Jaguar Puma. K12 aka 12h. Athlon Ryzen Threadripper Epyc. Italics indicates an upcoming architecture. AMD sockets and chipsets.

AMD sockets. Socket A Combined means that the given socket is supported by all platforms, including desktop, mobile, and server.

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